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Breaking the 1.58-bit Barrier for Ternary LLMs

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[2609.16338] Breaking the 1.58-bit Barrier for Ternary LLMs

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Computer Science > Artificial Intelligence

arXiv:2609.16338 (cs)

[Submitted on 14 Sep 2026]
Title:Breaking the 1.58-bit Barrier for Ternary LLMs
Authors:Evangelos Georganas, Alexander Heinecke, Pradeep Dubey View a PDF of the paper titled Breaking the 1.58-bit Barrier for Ternary LLMs, by Evangelos Georganas and 2 other authors
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Abstract:Ternary Large Language Models (LLM) store every weight as one of three symbols $\{-1,0,+1\}$, so the cost of a ternary model is conventionally referenced to the information-theoretic $\log_2 3 \approx 1.585$ bits per weight. The prevailing deployment format packs five ternary weights into one byte (five-trit packing), and due to the power-of-two group sizes used in practice this rounds up to $1.625$ bits per weight. This effective storage bit-width treats the three symbols $\{-1,0,+1\}$ as equiprobable. We measure the actual symbol distribution of 29 ternary LLM models and find that zeros account for up to $51.5\%$ of all weights. Motivated by this finding, we introduce BITCOS, a simple distribution-adaptive layout comprised of a dense presence bitmap plus a compacted sign vector, and costs $2 - z$ bits per weight element given a zero density $z$ in the model's weights. BITCOS stores weights more compactly than the five-trit packing in 26 of the 29 tested models, and reaches $1.485$ bits per weight on the sparsest of them. BITCOS is amenable to efficient unpacking on modern processors and GPUs, and we present optimized unpacking sequences for AVX-512, AVX2 and Intel Xe2 GPUs. Measured against production state-of-the-art ternary matrix-vector multiplication kernels, at the zero densities real-world ternary models exhibit, the realized gain with our proposed layout is up to $1.28\times$. Finally, we illustrate end-to-end LLM inference results on 5 different platforms (client and server CPUs, integrated and discrete Xe2 GPUs) where decode throughput improves by up to $1.18\times$ on CPUs and $1.27\times$ on GPUs.

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Artificial Intelligence (cs.AI); Machine Learning (cs.LG)

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arXiv:2609.16338 [cs.AI]

 
(or
arXiv:2609.16338v1 [cs.AI] for this version)

 
https://doi.org/10.48550/arXiv.2609.16338

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arXiv-issued DOI via DataCite (pending registration)

Submission history From: Evangelos Georganas [view email] [v1]
Mon, 14 Sep 2026 20:54:24 UTC (144 KB)

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Ternary Large Language Models (LLMs) represent a method where every weight is stored using only three symbols, specifically -1, 0, and +1. The theoretical information-theoretic cost for such a ternary model is conventionally referenced to $\log_2 3$, which is approximately $1.585$ bits per weight. However, practical deployment formats, such as the five-trit packing used commonly, often result in a higher effective storage cost, rounding up to $1.625$ bits per weight due to the reliance on power-of-two group sizes. The authors investigated this storage inefficiency, noting that when analyzing twenty-nine ternary LLM models, the distribution of these weights revealed that zeros account for up to fifty-one point five percent of all weight elements.

To address this observation, the authors introduced BITCOS, a novel distribution-adaptive layout designed to store these ternary weights more compactly. BITCOS integrates a dense presence bitmap along with a compacted sign vector. The cost associated with this layout is defined as $2 - z$ bits per weight element, where $z$ represents the density of zero weights present in the model. The implementation of BITCOS demonstrated improved compactness, successfully storing weights more efficiently than the five-trit packing in twenty-six of the tested models, and achieved a weight cost of $1.485$ bits per weight on the sparsest models. Furthermore, BITCOS is designed to be amenable to efficient unpacking operations on contemporary processor architectures and graphics processing units, and the work includes presenting optimized unpacking sequences tailored for AVX-512, AVX2, and Intel Xe2 GPUs.

When evaluated against production state-of-the-art ternary matrix-vector multiplication kernels, the realized performance gain achieved by the proposed layout in models exhibiting zero densities was up to $1.28\times$. Beyond computational kernel efficiency, the authors assessed the end-to-end inference results across five different platforms, including client and server CPUs, as well as integrated and discrete Xe2 GPUs. These inference experiments demonstrated tangible improvements in decode throughput, yielding gains of up to $1.18\times$ on CPUs and $1.27\times$ on GPUs.